IEEE

Design of a Versatile CMOS Synchronous Counter with Advanced Gating Techniques for Energy-Efficient Systems

Abstract: In this paper, a synchronous up/down counter using gate driver logic and high-speed local clock generation is designed and implemented in CMOS technology. The suggested counter is perfect ...
IEEE

Design of a 32-Bit ALU Using Cadence tools

Abstract: He design and optimization of a 32-bit Arithmetic Logic Unit (ALU) using Verilog HDL is a complex process that focuses on enhancing efficiency while managing resource constraints. Utilizing ...
IEEE

Designing An Energy-Efficient Flip-Flop with MTCMOS using Muller C-Element Technique

Abstract: In the contemporary landscape of electronics, the proliferation of devices has led to an exponential increase in power consumption. As electronic devices become more integrated into everyday ...
IEEE

Design and Implementation of a Smart Restaurant Menu Ordering System Using a WiFi Module and RFID Technology

Abstract: Customers are crucial in determining the quality of a restaurant and its food in today's food industry. Customers and waiters in restaurants have difficulty giving and taking orders. The ...
IEEE

A DICE Flip-Flop Design by Resetting Redundancy Hardening for Single Event Upset Tolerance

Abstract: The standard cell library forms the foundation of chip design. Conducting rational and efficient radiation-hardening design and performance verification for the library is essential to ...