Evolving Hardware Languages In The Age Of AI And LLMs

This is not about replacing Verilog. It’s about evolving the hardware development stack so engineers can operate at the level of intent, not just implementation.
EDN

Last-level cache has become a critical SoC design element

LLC, positioned between external memory and internal subsystems, stores frequently accessed data close to compute resources.
Semiconductor Engineering

A Framework That Generates Chip Layouts Directly From Natural Language Specifications (U. of Bristol, RAL)

LLM-aided interface for Open Source Chip Design,” was published by researchers at University of Bristol and Rutherford Appleton Laboratory. Abstract “The growing complexity of hardware design and the ...

ZeroRISC and Leading Research Institutions Deliver Production-Grade Post-Quantum Cryptography for Open Silicon

On the post-quantum side, Cryptolib now includes hardware-accelerated implementations of three families of NIST-standardized PQC algorithms: ML-KEM, ML-DSA, and SLH-DSA. The SLH-DSA (SPHINCS+) ...