Business Wire

Aldec’s Active-HDL Verification Capabilities Enhanced to Support SystemVerilog Constructs and UVM

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has greatly enhanced the verification ...
Business Wire

InterMotion Technology Boosts IP Verification Productivity for Lattice Semiconductor’s CrossLink FPGA Family Using Aldec’s Active-HDL

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, today announced that InterMotion Technology has ...
Electronic Design

EDA Update: Mixed HDL/C-Language Design For FPGAs

Mixed HDL/C-Language design for FPGAs recently debuted, courtesy of Aldec Inc. and Celoxica Ltd. The Active-HDL+C integrated FPGA design environment combines Aldec's Active-HDL design entry and ...
Business Insider

QuickLogic Announces Partnership with Aldec for eFPGA Simulation Flow

SUNNYVALE, Calif., Feb. 20, 2018 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, display bridge and programmable ...
EDN

Aldec tools validated for Lattice devices

SAN FRANCISCO — Mixed-language simulation and EDA tool provider Aldec Inc. said Monday (May 15) that programmable logic supplier Lattice Semiconductor Corp. has validated Aldec's Riviera and ...
EDN

Partnership Provides Benefits of Third Party Tools to Proprietary Design Environment

QuickLogic Corporation and Aldec, Inc. announced that QuickLogic is integrating Aldec's Active-HDLTM Lite verification environment into its QuickWorks QuickLogic and Aldec have partnered to provide ...
Electronic Design

Graphical Code Coverage Tool Speeds Design Debugging

Code Snooper, a code coverage software tool for use with the Active-HDL design and verification environment is integrated with the Active-HDL simulation kernel and does not require additional ...
Semiconductor Engineering

Linting With ALINT-PRO Within Active-HDL

Active-HDL suggests an early-bug-detection flow via the integration with ALINT-PRO. The Active-HDL user has an access to both different linting methodologies supported by ALINT-PRO: full chip-level ...